Welcome to the world of SAMD21 clock configuration, where precision and optimization are key to unlocking the full potential of your microcontroller. In this article, we will delve into the intricacies of configuring clock sources, understanding the role of generic clocks, and maximizing power efficiency through strategic clock settings. Join us as we explore the intricate web of clock management in SAMD21 microcontrollers.
SAM D21 Clock System Overview
The SAM D21 microcontroller features a flexible clock system that allows you to configure various clock sources and their distribution. Let’s dive into the details:
-
Clock Sources:
- The SAM D21 MCU provides several master clock source modules:
- OSC8M: An internal 8 MHz oscillator.
- OSC32K: A 32.768 kHz high-accuracy internal oscillator.
- OSCULP32K: A 32.768 kHz ultra-low-power internal oscillator.
- DFLL48M: An internal digital frequency-locked loop that can track against other clock sources.
- FDPLL96M: An internal fractional digital phase-locked loop that can also track against other clock sources.
-
Generic Clocks (GCLK):
- Generic clocks are used to provide standardized clocks to various peripheral domains within the device.
- You can select one or more master source clocks as input to a Generic Clock Generator (GCLK).
- The GCLK can then prescale down the input frequency for use in a peripheral.
- Additionally, individually selectable Generic Clock Channels gate the various generator outputs for one or more peripherals.
- These clocks play a crucial role in synchronizing peripheral accesses by the CPU, especially when the CPU and peripherals operate in different clock domains.
-
Accessing GCLK Registers:
- The GCLK registers are controlled via the SYSCTRL peripheral.
- Key registers include:
- PCLKSR: Power and Clocks Status.
- OSC8M: 8 MHz Internal Oscillator Control.
- XOSC32K: External 32 kHz Oscillator Control.
- DFLLCTRL: 48 MHz Internal DFLL Oscillator Control.
-
Synchronous (CPU/Bus) Clocks:
- The main system clock (GCLK_MAIN) and clocks derived from it (CPU, AHB/APB Bus Clocks) are synchronous clocks.
- These clocks are generated by the Power Manager (PM) for peripherals.
- Internally, peripherals use asynchronous clocks generated by the Generic Clock Generators (e.g., SERCOM peripherals use a generic clock for the baud rate generator).
- To ensure synchronization, some peripheral accesses by the CPU are checked using the SYNCBUSY status register.
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Examples:
- Here’s a snippet demonstrating how to configure the DFLL48M to achieve a 48 MHz clock:
SYSCTRL->DFLLCTRL.reg |= SYSCTRL_DFLLCTRL_MODE | SYSCTRL_DFLLCTRL_WAITLOCK | SYSCTRL_DFLLCTRL_ENABLE;
while (!SYSCTRL->PCLKSR.bit.DFLLLCKC || !SYSCTRL->PCLKSR.bit.DFLLLCKF) {}
This code enables the DFLL48M and waits until it’s locked and stable.
For more detailed information and coding steps, refer to the official documentation
Clock Sources for SAMD21 Microcontroller
Let’s delve into the clock sources for the SAMD21 microcontroller. These clock sources play a crucial role in determining the timing and synchronization of various operations within the device. I’ll break it down for you:
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Internal Oscillators:
- OSC8M (8 MHz Internal Oscillator): This oscillator provides a stable 8 MHz frequency. It’s useful for general system clock needs.
- OSC32K (32.768 kHz High-Accuracy Internal Oscillator): A precise 32.768 kHz oscillator often used for real-time clock (RTC) functions.
- OSCULP32K (32.768 kHz Ultra Low-Power Internal Oscillator): An ultra-low-power version of the 32.768 kHz oscillator, suitable for low-power modes.
- DFLL48M (Digital Frequency-Locked Loop at 48 MHz): A dynamic frequency adjustment mechanism that can track against other clock sources.
-
External Clock Inputs:
- XOSC (External Crystal Oscillator): Allows you to connect an external crystal for more accurate timing.
- XOSC32K (External 32 kHz Oscillator): Similar to XOSC but operates at 32.768 kHz.
-
Generic Clocks (GCLK):
- These are used to provide clocks to various peripheral domains in a standardized manner.
- Generic Clock Generators (GCLKs): These take one or more master source clocks and can prescale down the input frequency for use in peripherals.
- Generic Clock Channels: These multiplex and gate the generator outputs for specific peripherals within the device.
Remember, the main system clock (GCLK_MAIN) and synchronous clocks (CPU, AHB/APB Bus Clocks) are generated from the main system clock. Asynchronous clocks (generic clocks) are used by peripherals like SERCOM for baud rate generation. The synchronization between CPU and peripherals is essential, and some peripheral accesses by the CPU need to be synchronized using the SYNCBUSY status register.
For more detailed information, you can explore the official documentation on SAM D21 clock system configuration
Clock Frequency Configuration on SAMD21 Microcontroller
Let’s walk through the steps for configuring the clock frequency on the SAMD21 microcontroller. The clock system is crucial for timing and synchronization in your application. Here’s a step-by-step guide:
-
Clock Sources:
- The SAM D21 MCU provides various clock sources, including:
- Internal R/C oscillators (such as OSC8M, OSC32K, OSCULP32K)
- Internal digital frequency-locked-loop (DFLL) modules (like DFLL48M)
- External crystal oscillators (XOSC) or clock inputs (XOSC32K)
- These clock sources are controlled via registers in the SYSCTRL peripheral.
- Key registers to configure include:
PCLKSR (Power and Clocks Status)OSC8M (8 MHz Internal Oscillator Control)XOSC32K (External 32 kHz Oscillator Control)DFLLCTRL (48 MHz Internal DFLL Oscillator Control)
-
Generic Clocks (GCLK):
- Generic clocks provide standardized clocks to peripheral domains.
- Steps for configuring generic clocks:
- Select one or more master source clocks as input to a Generic Clock Generator.
- The generator can prescale down the input frequency for use in a peripheral.
- Individually selectable Generic Clock Channels gate the generator outputs for peripherals.
- The main system clock (
GCLK_MAIN or GCLK0) drives the CPU and associated buses.
- After reset, the SAM D21 runs at 1 MHz using
GCLK0 .
-
Peripheral Clocks:
- Peripheral access registers are clocked by synchronous clocks generated by the Power Manager (PM).
- Internally, peripherals use asynchronous clocks from the Generic Clock Generators.
- Some peripheral accesses by the CPU need synchronization; check the
SYNCBUSY status register.
- For detailed coding steps, refer to the official documentation.
Optimizing Clock Settings for SAMD21 Microcontroller
The SAMD21 microcontroller, commonly used in boards like the Arduino Zero, can exhibit higher power consumption than expected in active mode. Let’s explore ways to optimize its clock settings and reduce power usage.
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Clock Settings and Power Consumption:
- According to the datasheet, the SAMD21 should consume around 3mA while running a simple algorithm at 48MHz. However, some users have reported higher consumption even with minimal code.
- The USB peripheral is a significant contributor to power usage. Disabling USB using
USBDevice.detach() may not be sufficient.
- Peripheral clocks and power must be managed explicitly to achieve optimal power efficiency.
-
Optimizing Clocks and Peripherals:
- AHBMASK and clock rates for APBA, APBB, and APBC can be adjusted to reduce power. Here’s an example code snippet:
void setup() {
reset_gclks();
disconnect_periph();
PM->AHBMASK.reg = 0B000010111;
PM->APBASEL.reg = 0x7;
PM->APBBSEL.reg = 0x7;
PM->APBCSEL.reg = 0x7;
// Other clock masks (APBAMASK, APBBMASK, APBCMASK) can be set to 0
}
void reset_gclks(void) {
for (uint8_t i = 1; i < GCLK_GEN_NUM; i++) {
disable_gclk(i);
disable_clock_generator(i);
}
}
void disable_gclk(uint8_t gclk) {
while (GCLK->STATUS.bit.SYNCBUSY == 1) {}
GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(gclk);
while (GCLK->STATUS.bit.SYNCBUSY == 1) {}
}
- This code reduces active mode consumption to 3.5mA, aligning with the datasheet.
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Further Exploration:
- Consider experimenting with the 96MHz Fractional Digital Phase Locked Loop (FDPLL96M) and routing it to unused timers (e.g., TCCx/TC3) to explore extreme power-saving scenarios.
- Refer to the SAMD21 Power Manager (PM) documentation for additional insights on standby and idle modes.
Configuring Clock System for SAMD21 Microcontroller
Configuring the clock system for the SAMD21 microcontroller can be intricate, but I’ll provide some strategies and insights to troubleshoot any issues you might encounter:
-
Understand the Clock System Basics:
- Familiarize yourself with the clock sources available in the SAMD21 MCU. These include internal oscillators (such as OSC8M, OSC32K, and OSCULP32K), digital frequency-locked-loop (DFLL) modules (like DFLL48M), and external crystal oscillators (XOSC) .
- The generic clocks (GCLKs) play a crucial role in providing standardized clocks to various peripheral domains. You can select master source clocks as input to a Generic Clock Generator, which then prescales the frequency for use in peripherals .
-
Configure the Clock Sources:
- Use the SYSCTRL peripheral to control clock sources. Key registers include:
OSC8M: 8 MHz internal oscillator control.XOSC32K: External 32 kHz oscillator control.DFLLCTRL: 48 MHz internal DFLL oscillator control .
-
Set Up Generic Clocks:
- Generic clocks are used to provide clocks to peripheral domains. Configure them as follows:
- Select one or more master source clocks as input to a Generic Clock Generator.
- Use the generator to prescale down the input frequency for peripheral use.
- Enable specific Generic Clock Channels to multiplex and gate generator outputs for peripherals .
-
Peripheral Clock Configuration:
- Remember that multiple peripherals can share the same GCLK.
- Configure the generic clock multiplexer to connect the GCLK to the peripheral.
- Enable the peripheral’s interface clock using the Power Manager (PM) peripheral .
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Example: Configuring SERCOM0 Clock:
- Let’s take SERCOM0 as an example:
- Set up the GCLK to connect to SERCOM0.
- Enable the interface clock for SERCOM0 using PM.
- Ensure proper synchronization between CPU and peripheral clocks .
-
Check for Synchronization Issues:
- As the CPU and peripherals can be in different clock domains, some peripheral accesses by the CPU need to be synchronized.
- Use the SYNCBUSY status register in peripherals to check if a sync operation is in progress .
In conclusion, mastering the SAMD21 clock configuration is essential for achieving optimal performance and power efficiency in your embedded applications. By understanding the diverse clock sources, configuring generic clocks effectively, and managing peripheral clocks with finesse, you can harness the full power of your microcontroller. Dive deep into the world of clock synchronization and power optimization, armed with the knowledge and insights gained from this exploration of SAMD21 clock configuration.
May your journey in clock management be smooth and successful as you navigate the complexities of clock systems in SAMD21 microcontrollers.
